Archive for June, 2012

Got to debug a few fun board bringup problems at work recently, and even have been writing a pile of code for the project in VHDL, and Labview FPGA. One involved an HDMI receiver chip that wasn’t putting out stable hsync pulses, there were periodic weird glitches that would cause the downstream logic to get confused about how many lines were in the frame. The solution turned out to be adding an obscure and almost undocumented set of reset commands to its initialization sequence. Send the magic incantation to the chip and voila, clean signal. Took days to find that one. Someone ought to tell Silicon Image that stuff like that should be at the front of the programmers’s ref in big bold type, not buried at the end in obscure language.

The next one was finding a fun off-by-one error in a VHDL CRC calculator. Pipeline delay was causing the calculation to start and end one value too late at its input stream. Had to use Isim to prove that what we were producing was a wrong value, and validate the fix.

It’s fun playing Developer for a while, but I also remember now why I went into program management. Debugging drives me berserk some days. About a week ago it took me nearly an entire day to find a tiny missing line segment in a Labview diagram that would’ve been an instant compiler warning in pretty much any other language… But find it I did, much to my blood pressure’s relief.


Just met Jeri Ellsworth by chance at the NW Pinball and Arcade show. She was very gracious and handles her Internet stardom well.

%d bloggers like this: